The Hong Kong Polytechnic University (PolyU) has announced a breakthrough in transistor technology that could redefine the future of energy-efficient computing and artificial intelligence. A research team led by Prof. Jianhua Hao, Head of the Department of Physics and Materials and Chair Professor of Materials Physics and Devices at PolyU, has engineered a novel tunnelling field-effect transistor (TFET) using 2D nanomaterials. This innovation overcomes the physical 'Boltzmann limit,' a long-standing barrier that has constrained the energy efficiency of conventional transistors.
Conventional transistors operate based on thermionic emission, requiring a minimum gate voltage of 60 millivolts (mV) to switch on. This constraint, rooted in the Boltzmann limit, makes subthreshold swing (SS) values below 60 mV per decade physically impossible at room temperature. As a result, further miniaturization and performance gains in traditional semiconductors have become increasingly difficult. The PolyU team's TFET, however, bypasses this limitation by employing quantum tunnelling.
Prof. Hao explained, 'By adopting quantum tunnelling, our TFET breaks through this boundary, paving the way for ultra-low-power, high-performance integrated circuits essential for emerging AI chips and advanced semiconductor applications.' The team achieved this by creating ultra-thin heterostructures composed of alternating layers of 2D bismuth and indium selenide using pulsed laser deposition. Through precise control of the layer structure, the normally semi-metallic bismuth transforms into a semiconductor in its 2D form, enabling efficient quantum tunnelling of charge carriers into indium selenide.
The resulting TFET demonstrated SS values well below the 60 mV per decade limit, operating at room temperature on silicon substrates. Notably, the device required a gate-voltage range of only 160 mV, compared to the 800 mV needed in conventional devices. This dramatic reduction in voltage translates to significantly lower power consumption, a critical factor for next-generation electronics.
Beyond its energy efficiency, the TFET also resolved a major challenge in experimental TFETs by delivering high output current alongside an exceptionally high ON/OFF current ratio. This dual achievement ensures the device can drive multiple downstream logic gates while minimizing circuit delay, making it practical for real-world integrated circuits.
The research was conducted in collaboration with the National University of Singapore, The Hong Kong University of Science and Technology, Peking University, and the Singapore University of Technology and Design. The findings were published in the prestigious journal Science, highlighting the significance of this work.
As the demand for AI chips and high-performance computing grows, the need for transistors that can operate at lower voltages without sacrificing speed is paramount. This breakthrough offers a viable path forward, potentially leading to more efficient data centers, longer battery life in portable devices, and enhanced capabilities for AI applications. The implications extend beyond consumer electronics to fields such as healthcare, autonomous vehicles, and scientific research, where advanced computing power is essential.
Prof. Hao and his team's achievement marks a pivotal step in semiconductor technology, demonstrating that innovative materials and design can overcome fundamental physical limits. With further development, this TFET could become a cornerstone of future energy-efficient computing architectures.
